1. Field of Invention
The present invention generally relates to a hybrid circuit having a two-wire/four-wire converting function, and more particularly to a hybrid circuit having a digital balancing circuit.
2. Description of the Related Art
A conventional two-wire PCM channel unit having a two-wire/four-wire converting function includes a power receiving unit, and a power supply unit, which supplies a voltage of -48 V to a terminal. Conventionally, these units are coupled with each other by a hybrid transformer having the two-wire/four-wire converting function.
FIG. 1 is a block diagram of a related hybrid circuit in a PCM channel unit using a hybrid transformer. As shown, the PCM channel unit includes terminals TIP and RING for a two-wire line, and signal sending and receiving terminals SOUT and RIN for a four-wire line. Further, the PCM channel unit includes a hybrid transformer 61, rough gain adjustment circuit 62 and 63, a conversion block 64, an adder 67, a balancing circuit 68, equalizers 69 and 70, a compressing unit 71, and de-compressing (expanding) unit 72. The conversion block 64 is composed of an analog-to-digital (A/D) converter 65, and a digital-to-analog (D/A) converter 66. Each of the equalizers 69 and 70 executes a fine level adjustment procedure and a loss equalizing procedure. The compressing unit (L/.mu.) 71 converts a linear code L into a compressed code based on the .mu.-rule, and the expanding unit (.mu./L) 72 converts the .mu.-rule based compressed code into the linear code L. The functions of the elements designated by reference numerals 67-72 are implemented by a digital signal processor.
The compressed code based on the .mu. rule is input to the expander 72 via the signal receiving terminal RIN. The expander 72 converts the received compressed code into a linear code, which is subjected to the fine level adjustment procedure and the loss equalizing procedure by the equalizer 70. An output signal of the equalizer 70 is input to the D/A converter 66 and the balancing circuit 68. The D/A converter 66 converts the digital signal into an analog signal, which is amplified by the rough gain adjustment circuit 63 and sent out to the two-wire line coupled to the terminals TIP and RING via the hybrid transformer 61.
Meanwhile, an analog signal transmitted via the terminals TIP and RING is input to the A/D converter 65 via the hybrid transformer 61 and the rough gain adjustment circuit 62. Then, the analog signal is converted into a digital signal by the A/D converter 65, and applied to a plus terminal of the adder 67. The balancing circuit 68 outputs a pseudo echo to a minus terminal of the adder 67. Thereby, a return echo contained in the signal from the A/D converter 6 is canceled by the pseudo echo. An output signal of the adder 67 is input, via the equalizer 69, to the compressor 71, which converts the output signal from the adder 67 into the compressed code based on the .mu. rule. The compressed code is sent out via the terminal SOUT.
The balancing circuit 68 produces a transform characteristic identical to that of an echo return route. The balancing circuit 68 can be realized, together with other functions, by a digital signal processor. An equalizing function (EQ), an interpolation filtering function (FIL), and a transfer function (Ht) of an echo return route are realized by digital processing. It will be noted that the echo return route includes the D/A converter 66, the rough gain adjustment circuit 63, the hybrid transformer 61, the rough gain adjustment circuit 62 and the A/D converter 64, and the return echo passes through these elements in this order. As has been described previously, the adder 67 functions to cancel the return echo by the pseudo echo generated by the balancing circuit 68.
FIG. 2 is a block diagram of another related hybrid circuit in the PCM channel unit using an active hybrid circuit. The PCM channel unit includes a non-inverting amplifier 81, an inverting amplifier 82, a differential amplifier 83, rough gain adjustment circuits 84 and 85, a conversion circuit 86, an adder 89, a balancing circuit 90, equalizers 91 and 92, a compressor 93, and an expander 94. The conversion circuit 86, which includes an A/D converter 87 and a D/A converter 88, operates in the same way as the conversion circuit 64 shown in FIG. 1. The compressor 93 and the expander 94 function in the same way as the compressor 71 and the expander 72 shown in FIG. 1. Further, the hybrid circuit shown in FIG. 2 includes a resistor R1 and a capacitor C1, both of which form a terminating impedance. Generally, the elements designated by reference numerals 89-94 are realized by a digital signal processor.
The balancing circuit 90 has the equalizing function (EQ) and the interpolation filtering function (FIL) in the same way as the balancing circuit 68 shown in FIG. 1. Further, the balancing circuit 90 has a transfer function (Ha) of an echo return route, which function is different from that of the balancing circuit 68. The echo return route in the configuration shown in FIG. 2 includes the D/A converter 88, the rough gain adjustment circuit 85, the non-inverting amplifier 81 and the inverting amplifier 82, the differential amplifier 83, the rough gain adjustment circuit 84 and the A/D converter 87, and the return echo passes through these elements in this order. The balancing circuit 90 generates a pseudo echo, which is subtracted from the signal from the A/D converter 87, so that the return echo contained in the output from the A/D converter 87 is canceled.
FIG. 3 is a block diagram of the active hybrid circuit shown in FIG. 2. In FIG. 3, those parts which are the same as those shown in FIG. 2 are given the same reference numerals. The active hybrid circuit shown in FIG. 3 includes transistors 95 and 96, an adder 97, and an echo canceller 98. A voltage of -48 V is applied to the terminal RING via the transistor 96, so that electricity is supplied to the two-wire line coupled to the terminals TIP and RING.
The transfer function Ht of the echo return route formed in the hybrid circuit using the hybrid transformer 61 shown in FIG. 1 is expressed as follows: EQU Ht=(1/4)[(Z-R1)/(Z+R1)] (1)
where Z is an impedance obtained by viewing the two-wire line from the terminals TIP and RING, and R1 is a standard impedance of the hybrid transformer 61, which is twice a resistor connected between an intermediate tap of the hybrid transformer 61 and the system ground.
The transfer function Ha of the echo return route formed in the hybrid circuit using the active hybrid circuit shown in FIGS. 2 and 3 is expressed as follows: EQU Ha=(.alpha..multidot.Z.multidot.Z')/(Z+Z') (2)
where Z' is the impedance of a series circuit consisting of the resistor R1 and the capacitor C1, and .alpha. is a constant having the dimension of admittance. It can be seen from the above description that the balancing circuit 90 must be formed in a way different from that of the balancing circuit 68.
In order to realize a return echo cancelling circuit in the analog domain, a circuit is used which is composed of an operational amplifier, a resistor and a capacitor. FIG. 4 is a circuit diagram of the balancing circuit 90 used for the active hybrid circuit type. An operational amplifier has a non-inverting input terminal which is grounded, and an inverting input terminal which receives an input signal via a resistor R. The impedance between the inverting input terminal of the operational amplifier 99 and an output terminal thereof is indicated by Zx. Thus, the following formulas are obtained taking into account the aforementioned formula (2): EQU Zx=(Z.multidot.Z')/(Z+Z') EQU R=I/.alpha..
Thus, if the above two formulas stand or are used, it is possible for the adder 97 to cancel the return echo.
Generally, the impedance Z obtained by viewing the two-wire line depends on the length and type of cable. Thus, a plurality of impedance Zx elements are prepared in order to conform to typical types of cable, and are selectively used. The most typical impedance Zx is equal to Z'/2, in which Z' is a standard terminating impedance of a system. The impedance Z is equal to the impedance Z' if cables and so on are ideal ones.
A scheme is known in which a circuit for canceling a return echo in the two-wire/four-wire converting means using the hybrid transformer is formed of a digital signal processor (see Alfred Fettweis, "WAVE DIGITAL FILTER: THEORY AND PRACTICE", Proceedings of the IEEE, Vol. 74, No. 2, Feb., 1986, pp. 314, the disclosure of which is hereby incorporated by reference).
Recently, the active hybrid circuit type has been more widely used, and many hybrid transforms which are working tend to be replaced by the active hybrid circuit type. Under such a circumstance, it is required to provide a PCM channel unit in conformity with both the hybrid transformer type and the active hybrid circuit type. In order to meet this requirement, it may be possible to provide two balancing circuits 68 and 90 in the PCM channel unit. However, this increases the size and cost of the PCM channel unit. Further, in the case where the transfer function Ha used in the active hybrid circuit type is realized by only digital signal processing, if a large-amplitude signal is input to the A/D converter 87 of the PCM channel unit, the A/D converter 87 will overflow, so that the output signal of the A/D converter 87 will be distorted.